Trench MOSFET having implanted drain-drift region and process for manufacturing the same

ABSTRACT

A trench MOSFET is formed in a structure which includes a P-type epitaxial layer overlying an N+ substrate. A trench is formed in the epitaxial layer. A deep implanted N layer is formed below the trench at the interface between the substrate and the epitaxial layer, and N-type dopant is implant through the bottom of the trench to form an N region in the epitaxial layer below the trench but above and separated from the deep N layer. The structure is heated to cause the N layer to diffuse upward and the N region to diffuse downward. The diffusions merge to form a continuous N-type drain-drift region extending from the bottom of the trench to the substrate. Alternatively, the drain-drift region may be formed by implanting N-type dopant through the bottom of the trench at different energies, creating a stack of N-type regions that extend from the bottom of the trench to the substrate.

[0001] This application is a continuation-in-part of co-ownedapplication Ser. No. 09/898,652, filed Jul. 3, 2001, which isincorporated herein by reference in its entirety.

FIELD OF THE INVENTION

[0002] This invention relates to power MOSFETs and in particular to atrench-gated power MOSFET with superior on-resistance and breakdowncharacteristics. This invention also relates to a process formanufacturing such a MOSFET.

BACKGROUND OF THE INVENTION

[0003] A conventional trench-gated power MOSFET 10 is shown in thecross-sectional view of FIG. 1. MOSFET 10 is formed in an N+semiconductor substrate 11, on which an N-epitaxial layer 12 is grown. Agate 13 is formed in a trench 14 which extends downward from the topsurface of the N-epitaxial (N-epi) layer 12. The gate is typically madeof polycrystalline silicon (polysilicon) and is electrically isolatedfrom the N-epi layer 12 by an oxide layer 15. The voltage applied to thegate 13 controls the current flowing between an N+ source 16 and a drain18, through a channel located adjacent the wall of the trench 14 in a Pbody 17. Drain 18 includes the N-epi layer 12 and N+ substrate 11. Ametal contact layer 19 makes electrical contact with the N+ source 16and with the P body 17 through a P+ body contact region 20. A similarmetal contact layer (not shown) typically provides an electricalconnection with the bottom side of the drain 18.

[0004] Ideally, the MOSFET would operate as a perfect switch, withinfinite resistance when turned off and zero resistance when turned on.In practice, this goal cannot be achieved, but nonetheless two importantmeasures of the efficiency of the MOSFET are its on-resistance andavalanche breakdown voltage (hereinafter “breakdown voltage”). Anotherimportant criterion is where the breakdown occurs. Since the drain isnormally biased positive with respect to, the source, the junction 21 isreverse-biased, and avalanche breakdown normally occurs at the corner ofthe trench, where the electric field is at a maximum. Breakdown createshot carriers which can damage or rupture the gate oxide layer 15. It istherefore desirable to design the device such that breakdown occurs inthe bulk silicon, away from the trench 14.

[0005] Another important characteristic of a MOSFET is its thresholdvoltage, which is the voltage that needs to be applied to the gate inorder to create an inversion layer in the channel and thereby turn thedevice on. In many cases it is desirable to have a low thresholdvoltage, and this requires that the channel region be lightly doped.Lightly doping the channel, however, increases the risk of punchthroughbreakdown, which occurs when the depletion region around the junction 21expands so as to reach all the way across the channel to the source. Thedepletion region expands more rapidly when the body region is morelightly doped.

[0006] One technique for reducing the strength of the electric field atthe corners of the trench and promoting breakdown in the bulk siliconaway from the trench is taught in U.S. Pat. No. 5,072,266 to Bulucea etal. (the “Bulucea patent”) This technique is illustrated in FIG. 2,which shows a MOSFET 25, which is similar to MOSFET 10 of FIG. 1 exceptthat a deep P+ diffusion 27 extends downward from the P body 17 to alevel below the bottom of the trench. Deep P+ diffusion 27 has theeffect of shaping the electric field in such a way as to reduce itsstrength at the corner 29 of the trench.

[0007] While the technique of the Bulucea patent improves the breakdownperformance of the MOSFET, it sets a lower limit on the cell pitch,shown as “d” in FIG. 2, because if the cell pitch is reduced too much,dopant from the deep P+ diffusion will get into the channel region ofthe MOSFET and increase its threshold voltage. Reducing the cell pitchincreases the total perimeter of the cells of the MOSFET, providing agreater gate width for the current, and thereby reduces theon-resistance of the MOSFET. Thus, using the technique of the Buluceapatent to improve the breakdown characteristics of the MOSFET makes itmore difficult to reduce the on-resistance of the MOSFET.

[0008] To summarize, the design of a power MOSFET requires that acompromise be made between the threshold and breakdown voltages andbetween the on-resistance and breakdown characteristics of the device.There is thus a clear need for a MOSFET structure that avoids orminimizes these compromises without adding undue complexity to thefabrication process.

SUMMARY OF THE INVENTION

[0009] In accordance with this invention a power MOSFET is formed in asemiconductor substrate of a first conductivity type which is overlainby an epitaxial layer of a second conductivity type. A trench is formedin the epitaxial layer. The power MOSFET also includes a gate positionedin the trench and electrically isolated from the epitaxial layer by aninsulating layer which extends along the side walls and bottom of thetrench. The epitaxial layer comprises a source region of the firstconductivity type, the source region being located adjacent a topsurface of the epitaxial layer and a wall of the trench; a base or bodyof the second conductivity type; and a drain-drift region of the firstconductivity type extending from the substrate to the bottom of thetrench, a junction between the drain-drift region and the body extendingfrom the substrate to a side wall of the trench. The power MOSFET canoptionally include a threshold adjust implant, and the epitaxial layercan include two or more sublayers having different dopant concentrations(“stepped epi layer”).

[0010] In an alternative embodiment the trench extends through theentire epitaxial layer and into the substrate, and there is no need forthe drain-drift region.

[0011] This invention also includes a process of fabricating a powerMOSFET comprising providing a substrate of a first conductivity type;growing an epitaxial layer of a second conductivity type opposite to thefirst conductivity type on the substrate; forming a trench in theepitaxial layer; introducing dopant of the first conductivity typethrough a bottom of the trench to form a drain-drift region, thedrain-drift region extending between the substrate and the bottom of thetrench; forming an insulating layer along the bottom and a sidewall ofthe trench; introducing a conductive gate material into the trench; andintroducing dopant of the first conductivity type into the epitaxiallayer to form a source region, the drain-drift region and the sourceregion being formed under conditions such that the source region anddrain-drift region are separated by a channel region of the epitaxiallayer adjacent the side wall of the trench. The dopant used to form thedrain-drift region may be implanted through the same mask that is usedto etch the trench.

[0012] There are several ways for forming the drain-drift region. Thefollowing are several examples. Dopant of the first conductivity typemay be implanted into the region between the bottom of the trench andthe substrate, with substantially no subsequent diffusion of the dopant.The dopant may be implanted at less energy into a region just below thebottom of the trench and may be diffused downward until it merges intothe substrate. A “deep” submerged region of dopant may be formed at ornear the interface between the substrate and the epitaxial layer, andthe dopant may be diffused upward until it reaches the bottom of thetrench. The deep region may be formed by implanting dopant at arelatively high energy through the trench bottom. Both a deep region ofdopant near the substrate/epitaxial layer interface and region of dopantjust below the trench may be formed, and the regions may be diffusedupward and downward, respectively, until they merge. A series ofimplants may be performed through the bottom of the trench to create a“stack” of regions that together form a drain-drift region.

[0013] Instead of growing an epitaxial layer of a second conductivitytype on the substrate, an epitaxial layer of the first conductivity typemay be grown, and a dopant of the second conductivity type may beimplanted into the epitaxial layer and diffused downward until thedopant reaches the interface between the substrate and the epitaxiallayer.

[0014] Regardless of whether an epitaxial layer of the first or secondconductivity type is used, dopant of the second conductivity type may beimplanted to form a more heavily doped body diffusion or as a thresholdadjust implant.

[0015] Alternatively, the trench can be made to extend through theepitaxial layer to the substrate. In this embodiment the drain-driftregion becomes unnecessary.

[0016] A MOSFET of this invention has several advantages, including thefollowing.

[0017] Because the drain-drift region is surrounded laterally by asecond conductivity type portion of the epitaxial layer, more effectivedepletion occurs and more first conductivity type dopant can be put intothe drain-drift region, thereby decreasing the on-resistance of theMOSFET. Because the profile of the dopant in the channel region isrelatively flat, the MOSFET can be made less vulnerable to punchthroughbreakdown without increasing its threshold voltage. Since the secondconductivity type portions of the epitaxial layer extend to thesubstrate except in the areas of the drain-drift region, there is noneed to form an additional second conductivity type layer forterminating the device. The separate mask for the deep diffusion of theBulucea patent and the termination region can be eliminated. Eliminatingthe deep body diffusion of the Bulucea patent allows for increased celldensity and reduced on-resistance.

[0018] A power MOSFET according to this invention can be fabricated inany type of cell geometry including, for example, closed cells of ahexagonal or square shape or cells in the form of longitudinal stripes.

BRIEF DESCRIPTION OF THE DRAWINGS

[0019]FIG. 1 is a cross-sectional view of a conventional trench-gatedMOSFET.

[0020]FIG. 2 is a cross-sectional view of a trench-gated MOSFETcontaining a deep diffusion to protect the gate oxide layer, as taughtin U.S. Pat. No. 5,072,266.

[0021]FIG. 3 is a cross-sectional view of a trench MOSFET in accordancewith the invention.

[0022]FIG. 4 is a cross-sectional view of a trench MOSFET in accordancewith the invention containing a threshold adjust implant.

[0023] FIGS. 5A-5L are cross-sectional views illustrating a process offabricating the MOSFETs of FIGS. 3 and 4.

[0024]FIG. 6 is a cross-sectional view of a trench MOSFET in accordancewith the invention formed in stepped epitaxial layer.

[0025]FIG. 7 is a cross-sectional view of a trench MOSFET in accordancewith the invention wherein the trench extends into the heavily-dopedsubstrate.

[0026]FIGS. 8A and 8B are graphs prepared using the computer simulationprogram SUPREME, showing the dopant concentrations in the MOSFET of FIG.3 at vertical cross-sections through the channel region and the bottomof the trench, respectively.

[0027]FIGS. 9A and 9B are graphs prepared using the computer simulationprogram MEDICI, showing the dopant concentrations in the MOSFET of FIG.3 at vertical cross-sections through the channel region and the bottomof the trench, respectively.

[0028]FIG. 10 illustrates the depletion regions in the MOSFET of FIG. 3under reverse bias conditions.

[0029]FIGS. 11A and 11B are cross-sectional views illustrating thetermination region of a MOSFET according to this invention and aconventional MOSFET, respectively.

[0030]FIGS. 12A and 12B are doping profile graphs illustrating athreshold adjust implant and a body implant, respectively.

[0031]FIG. 13A is a graph of the doping profile taken at a verticalcross-section through the channel of a conventional MOSFET having adiffused P body in an N-epi region.

[0032]FIG. 13B is a graph of the doping profile taken at a verticalcross-section through the channel of a MOSFET according to thisinvention having a P-epi layer and an N drain-drift region.

[0033]FIGS. 14A and 14B illustrate a process in which a body dopant isimplanted and driven in until it reaches the interface between the epilayer and the substrate.

[0034]FIGS. 15A and 15B illustrate a process in which a drain dopant isimplanted to form a deep layer near the interface between the epi layerand the substrate and then up-diffused until it reaches the bottom ofthe trench.

[0035]FIG. 16 shows the general shape of the doping profile in avertical cross-section below the trench when the drain-drift region isformed by implanting a deep layer and up-diffusing the deep layer.

[0036]FIGS. 17A and 17B illustrate a process of forming a drain-driftregion that includes an up-diffusion from a deep implanted layer and adown-diffusion from an implanted region below the bottom of the trench.

[0037]FIG. 18 shows an embodiment wherein the drain-drift regionincludes a stack of implanted regions.

[0038]FIG. 19 shows an embodiment wherein a P body region is driven into a level below the bottom of the trench but above the interfacebetween the epi layer and the substrate.

DESCRIPTION OF THE INVENTION

[0039] A cross-sectional view of a power MOSFET in accordance with thisinvention is shown in FIG. 3. MOSFET 30 is formed in an N+ substrate 32overlain by an epi layer 34, which is generally doped with a P-typeimpurity (hereinafter referred to as P-epi layer 34). N+ substrate 32can have a resistivity of from 5×10⁻⁴ ohm-cm to 5×10⁻³ ohm-cm, forexample, and P-epi layer 34 can be doped with boron to a concentrationof from 1×10¹⁵ cm⁻³ to 5×10¹⁷ cm⁻³. N+ substrate 32 is typically about200 microns thick and epi layer 34 could be from 2 microns to 5 micronsthick.

[0040] A trench 35 is formed in P-epi layer 34 and trench 35 contains apolysilicon gate 37. Gate 37 is electrically isolated from P-epi layer34 by an oxide layer 39 which extends along the sidewalls and bottom ofthe trench 35. MOSFET 30 also includes an N+ source region 36, which isadjacent a top surface of the P-epi layer 34 and a sidewall of thetrench 35, and a P+ body contact region 38. The remaining portion of theP-epi layer 34 forms a P-type base or body 34A. Body 34A forms ajunction with the N+ substrate 32 that is substantially coincident withthe interface between the P-epi layer 34 and N+ substrate 32. A metallayer 31 makes electrical contact with N+ source region and with P body34A through P+ body contact region 38.

[0041] Further, in accordance with this invention an N drain-driftregion 33 extends between the N+ substrate 32 and the bottom of thetrench 35. A junction 33A between N drain-drift region 33 and P body 34Aextends between N+ substrate 32 and a sidewall of the trench 35. Ndrain-drift region can be doped, for example, with phosphorus to aconcentration of from 5×10¹⁵ cm⁻³ to 5×10¹⁷ cm⁻³.

[0042]FIG. 8A is a graph of the doping concentration in MOSFET 30. Thegraph was prepared by the computer simulation program SUPREME and istaken at a vertical section through the channel region. The curvesindicated show the doping concentrations of arsenic and boron, and thethird curve shows the net doping concentration. FIG. 8B is a similargraph taken at a vertical section transecting the bottom of the trench.The horizontal axis of FIG. 8A is the distance in microns below thesurface of the P-epi layer; the horizontal axis of FIG. 8B is thedistance in microns below the bottom of the trench. The vertical axis ofFIGS. 8A and 8B is the logarithm₁₀ of the doping concentration inatoms/cm⁻³. Note that in FIG. 8A the concentration of boron, which isthe background dopant in P-epi layer 34, is relatively flat anddominates in the channel region. The doping concentration of arsenicincreases as one moves from the channel region into the source or thedrain.

[0043]FIGS. 9A and 9B are graphs of the doping concentration at the samesections, respectively, as FIGS. 8A and 8B. FIGS. 9A and 9B, however,were prepared using the computer simulation program MEDICI and show onlythe net doping concentration whether N-type or P-type.

[0044] The SUPREME and MEDICI simulations differ in that SUPREMEconsiders only the doping concentrations at a single verticalcross-section, without taking into account the effect of dopants atother laterally displaced positions, while MEDICI takes into account alldopants in the two-dimensional plane of the drawing.

[0045] The following are some of the advantages of MOSFET 30:

[0046] 1. Avalanche breakdown will generally occur at the interfacebetween the N+ substrate 32 and the P-epi layer 34, away from the trench(e.g., at the location designated 45 in FIG. 3). This avoids damage tothe gate oxide layer from the hot carriers generated in the area of thebreakdown.

[0047] 2. The gate oxide at the corners of the trench, where theelectric field reaches a maximum, is protected from rupture.

[0048] 3. A higher punchthrough breakdown voltage can be obtained for agiven threshold voltage. The junction between the N drain-drift regionand the P body extends downward to the N+ substrate. As shown in FIG.10, when the MOSFET is reverse-biased the depletion regions extend alongthe entire junction, and as a result the depletion region in the area ofthe channel does not expand as quickly towards the source region (seearrows). This is the condition that causes punchthrough breakdown.

[0049] 4. For another reason, a higher punchthrough breakdown voltagecan be obtained for a given threshold voltage. As shown in FIG. 13A, ina conventional 2 0 MOSFET having a diffused body, the dopantconcentration of the body falls off gradually as one approaches theN-epi (drift region). The threshold voltage is determined by the peakdoping concentration N_(A peak). The punchthrough breakdown voltage isdetermined by the total amount of charge Q_(channel) in the channelregion (represented by the area under the P body curve in FIG. 13A). Ina MOSFET of this invention, a doping profile of which is shown in FIG.13B, the dopant profile of the P-epi layer is relatively flat.Therefore, N_(A peak) can be the same while the total charge in thechannel is greater, providing a higher punchthrough breakdown voltage.

[0050] 5. Since there is no deep body diffusion in each cell (of thekind taught in the Bulucea patent) the cell pitch can be reduced withoutconcern that additional P-type dopant will get into the channel region,raising the threshold voltage of the MOSFET. Thus the cell packingdensity can be increased. This reduces the on-resistance of the device.

[0051] 6. In a conventional trench MOSFET a lightly-doped “drift region”is often formed between the channel and the heavily-doped substrate. Thedoping concentration in the drift region must be kept below a certainlevel because otherwise effective depletion is not obtained and thestrength of the electric field at the corner of the trench becomes toogreat. Keeping the doping concentration in the drift region lowincreases the on-resistance of the device. In contrast, the Ndrain-drift region 33 of this invention can be doped more heavilybecause the shape of N drain-drift region 33 and the length of thejunction between N drain-drift region 33 and P body 34A provide moreeffective depletion. A more heavily doped N drain-drift region 33reduces the on-resistance of the device.

[0052] 7. As shown in FIG. 11A, there is no need for a separate P-typediffusion in the termination region of the MOSFET, since the P-epi layerextends to the N+ substrate except where the N drain regions arelocated. FIG. 11B shows the termination region of a conventional MOSFETwhich includes a P-type diffusion 110. The elimination of the P-typetermination diffusion or field ring reduces the number of masking steps.For example, as described below, the process illustrated in FIGS. 5A-5Lrequires only five masking steps.

[0053] MOSFET 40, shown in FIG. 4, is an alternative embodiment which issimilar to MOSFET 30 except that MOSFET 40 contains a threshold voltageadjust implant 42. Illustratively, such an implant could increase thethreshold voltage of MOSFET 40 from 0.6 V to 1.0 V.

[0054] FIGS. 5A-5L illustrate the steps of forming MOSFETs 30 and 40. Itshould be noted that these figures are not necessarily drawn to scale.

[0055] The process begins with N+ substrate 32 (FIG. 5A), on which P-epilayer 34 is grown by a well known process (FIG. 5B). A thin oxide layer51 is then grown on the surface of P-epi layer 34 by heating in steam at1150° C. for about 50 minutes (FIG. 5C). Oxide layer 51 is masked andremoved from the “active area” of the device (i.e., from the area wherethe active MOSFET cells are to be located) and it is left in thetermination and gate pad areas (FIG. 5D).

[0056] A photoresist mask 52 is then formed on the surface of P-epilayer 34, and trench 35 is formed by a reactive ion etch (RIE) process.The process is terminated before the bottom of the trench reaches N+substrate 32 (FIG. 5E).

[0057] Leaving photoresist mask 52 in place, phosphorus is implantedthrough the bottom of trench 35 at a dose of 1×10¹³ cm⁻² to 1×10¹⁴ cm⁻²and an energy of 100 keV to 2.0 MeV to produce N drain-drift region 33(FIG. 5F). To avoid significant diffusion of the phosphorus and theconsequent expansion of N drain-drift region 33, the thermal budget towhich the structure is thereafter exposed is limited to the equivalentof about 950° C. for 60 minutes, or the structure can be subjected to arapid thermal anneal (RTA) at 1050° C. for 90 seconds. In either case, Ndrain-drift region 33 retains essentially the compact shape shown inFIG. 5F. Advantageously, in the cross-sectional view of FIG. 5F, atleast 75% and preferably 90% of the N drain-drift region 33 is locateddirectly below the trench 35.

[0058] Alternatively, N drain-drift region 33 can be formed byimplanting the phosphorus at a lower energy of 30 keV to 300 keV(typically 150 keV) to a level just below the bottom of the trench, anddiffusing the phosphorus by heating at 1050° C. to 1500° C. for 10minutes to 120 minutes (typically 1100° C. for 90 minutes), so that Ndrain-drift region 33 expands downward and laterally to a shape of thekind shown in FIG. 5G.

[0059] In another variant of the process, a deep layer 106 can be formedby implanting phosphorus at a relatively high energy (e.g., 300 keV to 3MeV) and at a dose of 1×10¹² to 1×10¹⁴ cm⁻², for example, to a levelbelow the trench, as shown in FIG. 15A, and a thermal process (e.g., 900to 100° C.) can be used to up-diffuse the phosphorus until it reachesthe bottom of the trench. This yields a drain-drift region 108, as shownin FIG. 15B. This is distinguishable from the process described above inconjunction with FIG. 5F, where after the implant the dopant extendsfrom the bottom of the trench to the interface between the N+ substrateand the P-epi layer, or in conjunction with FIG. 5G, where after theimplant the dopant lies just below the bottom of the trench. When theN-type dopant is implanted at a relatively high energy to form deeplayer 106, variations in the depth of the trench, the thickness of theP-epi layer 100, and the implant energy may cause layer 106 to belocated either above the interface (e.g., if P-epi layer 100 is thickand/or the trench depth is small) or in N+ substrate 102 (e.g., if P-epilayer 100 is thin and/or the trench depth is large).

[0060]FIG. 16 shows the general shape of the doping profile ofdrain-drift region 108 in a vertical cross-section starting at thebottom of the trench. As indicated, the concentration of N-type dopantin the drain-drift region increases monotonically with increasingdistance below the bottom of the trench. This is distinguishable fromthe doping profile below the trench in a MOSFET formed using thelow-energy process, as shown in FIG. 9B, where the doping concentrationinitially decreases below the trench bottom and then increases in thevicinity of the N+ substrate.

[0061] Using the high energy process and up-diffusing the N-type dopantfrom an deep implanted layer results in an N drain-drift region that isconfined largely to the area directly below the trench and allows asmaller cell pitch. It also is easier to control and provides greaterthroughput.

[0062] Alternatively, a combination up-diffusion, down-diffusion processcan be used to form the drain-drift region. As shown in FIG. 17A, deep Nlayer 106 (e.g., phosphorus) is formed at the interface of N+ substrate102 and P epi layer 100 by a high-energy implant process, as describedabove. An N-type dopant is implanted through the bottom of the trench ata lower energy to form an N region 120. Preferably, the implants aremade through an opening in the mask layer 126 that is used to form thetrench. The structure is then heated, for example, to 900° C. Deep Nlayer 106 diffuses upward and N region 120 diffuses downward until theymerge, forming N-type drain-drift region 122, as shown in FIG. 17B.

[0063] Yet another alternative is to form the drain-drift region with aseries of three or more N implants at successively greater energies toform a stack of overlapping implanted regions 124 as shown in FIG. 18.The stack 124 includes four implanted regions 124A-124D, but fewer ormore than four implants could also be used to form the stack. The stackcould be formed with essentially no diffusions (i.e., no heating), or itcould be heated to diffuse the dopant and increase the amount of overlapbetween the regions 124A-124D.

[0064] At the conclusion of the process, whether high energy or lowenergy, the N drain-drift region extends from N+ substrate 32 to thebottom of trench 35. In many cases, the PN junction between thedrain-drift region and P body 34A extends from N+ substrate 32 to asidewall of trench 35 and will be in the form of an arc that is concavetowards the drain-drift region (FIG. 5G).

[0065] Continuing with the description of the process, as shown in FIG.5G, a gate oxide layer 39 is then grown on the surface of P-epi layer 34and on the bottom and sidewalls of trench 35, typically to a thicknessof about 500 Å.

[0066] A polysilicon layer 53 is then deposited over the gate oxidelayer 39, filling the trench 35 (FIG. 5H). In an N-channel MOSFETpolysilicon layer 53 is typically doped with phosphorus to aconcentration of 5×10¹⁹ cm⁻³.

[0067] Polysilicon layer 53 is etched back so that its top surface issubstantially coplanar with the surface of P-epi layer 34. An oxidelayer 54 is formed on the top of the gate by thermal oxidation ordeposition (FIG. 5I).

[0068] Optionally, if the threshold voltage is to be adjusted, thresholdvoltage adjust implant 42 is formed. Implant 42 is formed, for example,by implanting boron through the surface of P-epi layer 34 (FIG. 5J) at adose of 5×10¹² cm⁻² and at an energy of 150 keV, yielding aconcentration of P-type atoms of 1×10¹⁷ cm⁻³ in the portion of P-epilayer 34 which will form the channel of the MOSFET. FIG. 12A is a graphshowing a dopant profile of a vertical cross-section taken through thechannel, showing a threshold adjust implant and indicating that thethreshold adjust implant is typically located in an area of the channeljust below the source region. The threshold voltage of the MOSFET isdetermined by the peak doping concentration N_(A peak) of the thresholdadjust implant. If the threshold voltage of the device does not need tobe adjusted, this step can be omitted.

[0069] Alternatively, a body implant can be performed, as illustrated inthe graph of FIG. 12B. The body implant is somewhat similar to thethreshold adjust implant but the energy used is higher and as a resultthe body implant extends to a level near the junction between the P-epilayer and the N drain-drift region. The threshold voltage of the MOSFETis determined by the peak doping concentration N_(A peak) of the bodyimplant.

[0070] In another embodiment, a P-type impurity such as boron isimplanted as a body 2 5 dopant and is driven in until the dopant reachesthe interface between the epi layer and the substrate. Such anembodiment is illustrated in FIGS. 14A and 14B. Epi layer 100 may belightly doped with either N-type or P-type impurity. As shown in FIG.14B, when the boron has been implanted and diffused, a P body region 104is formed on the N+ substrate 102. Alternatively, the P body diffusionmay be driven to a level below the bottom of the trench but above theinterface between the epi layer and the substrate, as evidenced by Pbody 128 in FIG. 19.

[0071] The structures containing P body 104 as shown in FIG. 14B, or Pbody 128 as shown in FIG. 19, can be used in all of the processes forforming a drain-drift region described herein. That includes the processshown in FIGS. 15A and 15B, involving the up-diffusion of a deepimplanted layer; the process shown in FIGS. 17A and 17B, involving theup-diffusion of a deep implanted layer and the down diffusion of animplanted region below the bottom of the trench; and the process shownin FIG. 18, involving the implanting of multiple N-type regions atdifferent energies to form a stack of overlapping regions.

[0072] Next, N+ source regions 36 and P+ body contact regions 38 areformed at the surface of P-epi layer 34, using conventional masking andphotolithographic processes (FIG. 5K). For example, N+ source regionscan be implanted with arsenic at a dose of 5×10¹⁵ cm⁻² and an energy of80 keV, yielding a concentration of 1×10²⁰ cm⁻³; P+ body contact regions38 can be implanted with boron at a dose of 1×10¹⁵ cm⁻² and an energy of60 keV, yielding a dopant concentration of 5×10¹⁹ cm⁻³.

[0073] Finally, metal layer 31, preferably aluminum, is deposited on thesurface of P-epi layer 34 in ohmic contact with N+ source regions 36 andP+ body contact regions 38.

[0074]FIG. 6 shows another alternative embodiment. MOSFET 60 is similarto MOSFET 30, but P-epi layer 34 is divided into sublayers Pepi1 andPepi2. Using a well-known process, an epi layer having sublayers can beformed by varying the flow rate of the dopant gas while the epi layer isbeing grown. Alternatively, sublayer Pepi1 can be formed by implantingdopant into the upper portion of the epi layer 34.

[0075] The dopant concentration of sublayer Pepi1 can be either greaterthan or less than the dopant concentration of sublayer Pepi2. Thethreshold voltage and punchthrough breakdown of the MOSFET are afunction of the doping concentration of sublayer Pepi1, while theavalanche breakdown voltage and on-resistance of the MOSFET are afunction of the doping concentration of sublayer Pepi2. Thus, in aMOSFET of this embodiment the threshold voltage and punchthroughbreakdown voltage can be designed independently of the avalanchebreakdown voltage and on-resistance. P-epi layer 34 may include morethan two sublayers having different doping concentrations.

[0076]FIG. 7 shows another alternative embodiment. In MOSFET 70drain-drift region 33 is omitted, and trench 35 extends entirely throughP-epi layer 34 into N+ substrate 32. This embodiment is particularlysuitable for low-voltage (e.g., 5 V or less) MOSFETs.

[0077] While several specific embodiments of this invention have beendescribed, these embodiments are illustrative only. It will beunderstood by those skilled in the art that numerous additionalembodiments may be fabricated in accordance with the broad principles ofthis invention. For example, while the embodiments described above areN-channel MOSFETs, a P-channel MOSFET may be fabricated in accordancewith this invention by reversing the conductivities of the variousregions in the MOSFET.

I claim:
 1. A process of fabricating a power MOSFET comprising:providing a substrate of a first conductivity type; providing anepitaxial layer of a second conductivity type opposite to said firstconductivity type on the substrate; forming a trench in the epitaxiallayer; implanting dopant of said first conductivity type through abottom of the trench to form a drain-drift region beneath said trenchand within said epitaxial layer, immediately following said implantingsaid drain-drift region extending from said trench to said substrate;forming an insulating layer along the bottom and a sidewall of thetrench; introducing a conductive gate material into the trench; andintroducing dopant of the first conductivity type into the epitaxiallayer to form a source region, the drain-drift region and the sourceregion being formed under conditions such that the source region anddrain-drift region are separated by a channel region of the epitaxiallayer adjacent the sidewall of the trench.
 2. The process of claim 1wherein providing an epitaxial layer comprises growing an epitaxiallayer of the second conductivity type on the substrate.
 3. The processof claim 1 wherein providing an epitaxial layer comprises growing anepitaxial layer of said first conductivity type and implanting dopant ofa second conductivity type opposite to said first conductivity type intosaid epitaxial layer.
 4. The process of claim 3 comprising heating saidepitaxial layer so as to diffuse said dopant of said second conductivitytype to an interface between said epitaxial layer and said substrate. 5.The process of claim 1 comprising implanting dopant of said secondconductivity type into said epitaxial layer to form a body region. 6.The process of claim 7 wherein implanting dopant of said firstconductivity type through a bottom of the trench to form a drain-driftregion comprises implanting dopant at an energy of from 100 keV to 2.0MeV.
 7. A process of fabricating a power MOSFET comprising: providing asubstrate of a first conductivity type; providing an epitaxial layer ofa second conductivity type opposite to said first conductivity type onthe substrate; forming a trench in the epitaxial layer; implantingdopant of said first conductivity type through a bottom of the trench toform a region of dopant beneath said trench and within said epitaxiallayer, said region of dopant being located above and separated from saidsubstrate; heating said substrate so as to cause said region of dopantto diffuse downward so as to form a drift-drain region extending fromsaid bottom of said trench to said substrate; forming an insulatinglayer along the bottom and a sidewall of the trench; introducing aconductive gate material into the trench; and introducing dopant of thefirst conductivity type into the epitaxial layer to form a sourceregion, the drain-drift region and the source region being formed underconditions such that the source region and drain-drift region areseparated by a channel region of the epitaxial layer adjacent thesidewall of the trench.
 8. The process of claim 7 wherein providing anepitaxial layer comprises growing an epitaxial layer of the secondconductivity type on the substrate.
 9. The process of claim 7 whereinproviding an epitaxial layer comprises growing an epitaxial layer ofsaid first conductivity type and implanting dopant of a secondconductivity type opposite to said first conductivity type into saidepitaxial layer.
 10. The process of claim 9 comprising heating saidepitaxial layer so as to diffuse said dopant of said second conductivitytype to an interface between said epitaxial layer and said substrate.11. The process of claim 7 comprising implanting dopant of said secondconductivity type into said epitaxial layer to form a body region. 12.The process of claim 7 wherein implanting dopant of said firstconductivity type through a bottom of the trench to form a region ofdopant comprises implanting dopant at an energy of from 30 keV to 300keV.
 13. A process of fabricating a power MOSFET comprising: providing asubstrate of a first conductivity type; providing an epitaxial layer ofa second conductivity type opposite to said first conductivity type onthe substrate; forming a trench in the epitaxial layer; implantingdopant of said first conductivity type through a bottom of the trench toform a deep layer of dopant beneath said trench and approximately at aninterface between said substrate and said epitaxial layer, said deeplayer of dopant being located below and separated from said trench;heating said substrate so as to cause said deep layer of dopant todiffuse upward so as to form a drift-drain region extending from saidbottom of said trench to said substrate; forming an insulating layeralong the bottom and a sidewall of the trench; introducing a conductivegate material into the trench; and introducing dopant of the firstconductivity type into the epitaxial layer to form a source region, thedrain-drift region and the source region being formed under conditionssuch that the source region and drain-drift region are separated by achannel region of the epitaxial layer adjacent the sidewall of thetrench.
 14. The process of claim 13 wherein providing an epitaxial layercomprises growing an epitaxial layer of the second conductivity type onthe substrate.
 15. The process of claim 13 wherein providing anepitaxial layer comprises growing an epitaxial layer of said firstconductivity type and implanting dopant of a second conductivity typeopposite to said first conductivity type into said epitaxial layer. 16.The process of claim 15 comprising heating said epitaxial layer so as todiffuse said dopant of said second conductivity type to an interfacebetween said epitaxial layer and said substrate.
 17. The process ofclaim 13 comprising implanting dopant of said second conductivity typeinto said epitaxial layer to form a body region.
 18. The process ofclaim 13 wherein implanting dopant of said first conductivity typethrough a bottom of the trench to form a deep layer of dopant comprisesimplanting dopant at an energy of from 300 keV to 3.0 MeV.
 19. A processof fabricating a power MOSFET comprising: providing a substrate of afirst conductivity type; providing an epitaxial layer of a secondconductivity type opposite to said first conductivity type on thesubstrate; forming a trench in the epitaxial layer; implanting dopant ofsaid first conductivity type through a bottom of the trench to form adeep layer of dopant beneath said trench and approximately at aninterface between said substrate and said epitaxial layer; implantingdopant of said first conductivity type through a bottom of the trench toform a region of dopant beneath said trench and within said epitaxiallayer, said region of dopant being located above and separated from saiddeep layer of dopant; heating said substrate so as to cause said deeplayer of dopant to diffuse upward and said region of dopant to diffusedownward, said deep layer and said region merging to form a drift-drainregion extending from said bottom of said trench to said substrate;forming an insulating layer along the bottom and a sidewall of thetrench; introducing a conductive gate material into the trench; andintroducing dopant of the first conductivity type into the epitaxiallayer to form a source region, the drain-drift region and the sourceregion being formed under conditions such that the source region anddrain-drift region are separated by a channel region of the epitaxiallayer adjacent the sidewall of the trench.
 20. The process of claim 19wherein providing an epitaxial layer comprises growing an epitaxiallayer of the second conductivity type on the substrate.
 21. The processof claim 19 wherein providing an epitaxial layer comprises growing anepitaxial layer of said first conductivity type and implanting dopant ofa second conductivity type opposite to said first conductivity type intosaid epitaxial layer.
 22. The process of claim 21 comprising heatingsaid epitaxial layer so as to diffuse said dopant of said secondconductivity type to an interface between said epitaxial layer and saidsubstrate.
 23. The process of claim 19 comprising implanting dopant ofsaid second conductivity type into said epitaxial layer to form a bodyregion.
 24. The process of claim 19 wherein implanting dopant of saidfirst conductivity type through a bottom of the trench to form a regionof dopant comprises implanting dopant at an energy of from 30 keV to 300keV.
 25. The process of claim 19 wherein implanting dopant of said firstconductivity type through a bottom of the trench to form a deep layer ofdopant comprises implanting dopant at an energy of from 300 keV to 3.0MeV.
 26. A process of fabricating a power MOSFET comprising: providing asubstrate of a first conductivity type; growing an epitaxial layer onthe substrate; forming a trench in the epitaxial layer; implantingdopant of said first conductivity type through a bottom of the trench toform a first region of dopant beneath said trench; implanting dopant ofsaid first conductivity type through a bottom of the trench to form asecond region of dopant beneath said trench, said first and secondregions overlapping each other immediately after said implanting, saidfirst and second regions being arranged in a stack extending betweensaid trench and said substrate; forming an insulating layer along thebottom and a sidewall of the trench; introducing a conductive gatematerial into the trench; and introducing dopant of the firstconductivity type into the epitaxial layer to form a source region, thedrain-drift region and the source region being formed under conditionssuch that the source region and drain-drift region are separated by achannel region of the epitaxial layer adjacent the sidewall of thetrench.
 27. The process of claim 26 where said substrate is notsubjected to any substantial thermal processing after said implanting ofdopant to form said first and second regions.
 28. A process offabricating a power MOSFET comprising: providing a substrate of a firstconductivity type; growing an epitaxial layer on the substrate; forminga trench in the epitaxial layer; implanting dopant of said firstconductivity type through a bottom of the trench at a plurality ofpredetermined energies to form a plurality of dopant regions of dopantbeneath said trench, immediately after said implanting adjacent ones ofsaid dopant regions overlapping so as to form a stack extending betweensaid trench and said substrate; forming an insulating layer along thebottom and a sidewall of the trench; introducing a conductive gatematerial into the trench; and introducing dopant of the firstconductivity type into the epitaxial layer to form a source region, thedrain-drift region and the source region being formed under conditionssuch that the source region and drain-drift region are separated by achannel region of the epitaxial layer adjacent the sidewall of thetrench.
 29. A power MOSFET comprising: a substrate of a firstconductivity type; an epitaxial layer on said substrate, said epitaxiallayer generally being of a second conductivity type opposite to saidfirst conductivity type, a trench being formed in said epitaxial layer;an insulating layer lining a bottom and a sidewall of said trench; aconductive gate in said trench; a source region adjacent a surface ofsaid epitaxial layer; and a drain-drift region of said firstconductivity type extending through said epitaxial layer from a bottomof said trench to said substrate, said drain-drift region forming a PNjunction with a portion of said epitaxial layer of said secondconductivity type.
 30. The power MOSFET of claim 29 wherein at least 75%of a cross-sectional area of said drain-drift region is located directlybelow said trench.
 31. The power MOSFET of claim 30 wherein at least 90%of a cross-sectional area of said drain-drift region is located directlybelow said trench.
 32. The power MOSFET of claim 29 wherein said PNjunction intersects a sidewall of said trench.
 33. The power MOSFET ofclaim 29 wherein said PN junction is concave in the towards an interiorportion of said drain-drift region.
 34. The power MOSFET of claim 29wherein said drain-drift region comprises a plurality of implants madeat different energies.
 35. The power MOSFET of claim 29 wherein saidepitaxial layer comprises two sublayers having different dopingconcentrations.
 36. The power MOSFET of claim 29 comprising a bodyregion of said second conductivity type in said epitaxial layer.
 37. Thepower MOSFET of claim 36 wherein a lower border of said body region isat a level below a bottom of said trench.
 38. The power MOSFET of claim37 wherein said body region extends to said substrate.
 39. A powerMOSFET comprising: a substrate of a first conductivity type; anepitaxial layer on said substrate, said epitaxial layer generally beingof a second conductivity type opposite to said first conductivity type,a trench extending from a surface of said epitaxial layer through saidepitaxial layer and into said substrate; an insulating layer lining abottom and a sidewall of said trench; a conductive gate in said trench;and a source region of said first conductivity type adjacent saidsurface of said epitaxial layer and a sidewall of said trench.